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In a typical interconnect, there lie multiple places where capacitance plays a factor in the signal integrity. This includes the driver and receiver output/input capacitance, as well as the packages, vias, and the transmission lines. Failing to optimize these parameters can often lead to unwanted reflections, excessive radiated and or conducted emissions, and sometimes failure of components and systems.
Reflections can occur anytime there is an impedance mismatch on the line. Sources of mismatches are plentiful and include trace width changes, vias, stubs, reference plane changes, and even the so-called fiber weave effect. In this case, a trace can encounter a different dielectric constant depending on whether it is routed over glass or the epoxy resin in the dielectric material.
In this investigation, it is the capacitive contribution of the different components that are of interest, and how they affect the characteristic impedance the driver sees.
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Andy Shaughnessy, Design007 Magazine
For this issue on ultra HDI, we reached out to Tara Dunn at Averatek with some specific questions about how she defines UDHI, more about the company’s patented semi-additive process, and what really sets ultra HDI apart from everything else. Do designers want to learn a new technology? What about fabricators? We hope this interview answers some of those questions that you may be having about these capabilities and what it could mean for your designs.
Tomas Chester, Chester Electronic Design
Advances in technology have been clear to see within the component packaging industry, as the ball grid array (BGA) package sizes reduce from 1.0 mm pitch to 0.8 mm, 0.4 mm, and even beyond. However, while these improvements have occurred with component packages, it has become increasingly more difficult to break out and route the dense circuitry associated with these parts. Currently, the high-density interconnect (HDI) method typically used for the breakout of such parts has been to create the smallest possible subtractive-etched traces with microvias to allow for connections and escapes on the innerlayers of your PCB.
Steve Hageman, Analog Home
Does putting a ground pour on PCB signal layers make the isolation better or worse? It can go either way, but with the proper knowledge and application, this technique will improve your designs. In this article, I’ll discuss how to simulate trace-to-trace isolation with true electromagnetic simulation software. We’ll also cover a variety of rules of thumb that can help you stay away from trouble.