-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueLevel Up Your Design Skills
This month, our contributors discuss the PCB design classes available at IPC APEX EXPO 2024. As they explain, these courses cover everything from the basics of design through avoiding over-constraining high-speed boards, and so much more!
Opportunities and Challenges
In this issue, our expert contributors discuss the many opportunities and challenges in the PCB design community, and what can be done to grow the numbers of PCB designers—and design instructors.
Embedded Design Techniques
Our expert contributors provide the knowledge this month that designers need to be aware of to make intelligent, educated decisions about embedded design. Many design and manufacturing hurdles can trip up designers who are new to this technology.
- Articles
- Columns
Search Console
- Links
- Events
||| MENU - design007 Magazine
Beyond Design: Stackup Planning, Part 4
November 19, 2015 | Barry Olney, In-Circuit DesignEstimated reading time: 1 minute
In this final part of the Stackup Planning series, I will look at 10-plus layer counts. The methodology I have set out in previous columns can be used to construct higher layer-count boards. In general, these boards contain more planes and therefore the issues associated with split power planes can usually be avoided. Also, 10-plus layers require very thin dielectrics in order to reduce the total board thickness. This naturally provides tight coupling between adjacent signal and plane layers reducing crosstalk and electromagnetic emissions.
In high-speed digital designs, transient ground currents are the primary source of both unwanted noise voltages and radiated emissions. In order to minimize these emissions, the impedance of the ground should be minimized by reducing the inductive loop area. Inductance is directly proportional to the length of the conductor, so keep the loop area as short as possible.
To minimize inductance, two conductors (signal traces or ground planes) that carry current in the same direction should be separated. However, two conductors that carry current in the opposite direction (such as signal and ground planes or power and ground planes) should be positioned as closely as possible. Both these cases also help eliminate crosstalk.
Here are some additional rules for high-speed design:
- Use multiple ground planes, where possible, rather than power planes, in the stackup to isolate signal layers.
- Place stitching ground vias close to every signal transition (via) to provide a short current return path.
- Spread numerous ground stitching vias around the board to connect the multiple ground planes through a low impedance path.
- Don’t use ground pours on signal layers as this reduces the impedance of nearby traces. If you must, in order to balance copper, separate the signal and pour by 20 mils.
If power planes are used as reference planes, then the return current must transverse stitching capacitors in order to jump between ground and power planes. The current flowing through these stitching capacitors will create a voltage drop across them. These voltages may radiate adding to system noise problems.
To read this entire column, which appeared in the October 2015 issue of The PCB Design Magazine, click here.
Suggested Items
Insulectro’s 'Storekeepers' Extend Their Welcome to Technology Village at IPC APEX EXPO
04/03/2024 | InsulectroInsulectro, the largest distributor of materials for use in the manufacture of PCBs and printed electronics, welcomes attendees to its TECHNOLOGY VILLAGE during this year’s IPC APEX EXPO at the Anaheim Convention Center, April 9-11, 2024.
ENNOVI Introduces a New Flexible Circuit Production Process for Low Voltage Connectivity in EV Battery Cell Contacting Systems
04/03/2024 | PRNewswireENNOVI, a mobility electrification solutions partner, introduces a more advanced and sustainable way of producing flexible circuits for low voltage signals in electric vehicle (EV) battery cell contacting systems.
Heavy Copper PCBs: Bridging the Gap Between Design and Fabrication, Part 1
04/01/2024 | Yash Sutariya, Saturn Electronics ServicesThey call me Sparky. This is due to my talent for getting shocked by a variety of voltages and because I cannot seem to keep my hands out of power control cabinets. While I do not have the time to throw the knife switch to the off position, that doesn’t stop me from sticking screwdrivers into the fuse boxes. In all honesty, I’m lucky to be alive. Fortunately, I also have a talent for building high-voltage heavy copper circuit boards. Since this is where I spend most of my time, I can guide you through some potential design for manufacturability (DFM) hazards you may encounter with heavy copper design.
Trouble in Your Tank: Supporting IC Substrates and Advanced Packaging, Part 5
03/19/2024 | Michael Carano -- Column: Trouble in Your TankDirect metallization systems based on conductive graphite or carbon dispersion are quickly gaining acceptance worldwide. Indeed, the environmental and productivity gains one can achieve with these processes are outstanding. In today’s highly competitive and litigious environment, direct metallization reduces costs associated with compliance, waste treatment, and legal issues related to chemical exposure. What makes these processes leaders in the direct metallization space?
AT&S Shines with Purest Copper on World Recycling Day
03/18/2024 | AT&SThe Styrian microelectronics specialist AT&S is taking World Recycling Day as an opportunity to review the progress that has been made in recent months at its sites around the world in terms of the efficient use of resources: