The Pulse: Drilling Down on Documentation
Connect the Dots: Designing for Reality: Prioritizing Manufacturability
The Shaughnessy Report: Design Takes Center Stage at IPC APEX EXPOMentor Graphics Video: Automatically Unravel Complex FPGA Signals
December 2, 2015 | Mentor GraphicsEstimated reading time: Less than a minute
Optimizing large pin-count FPGAs is challenging. Manual optimization can take days and result in reduced quality.
This new video from Mentor Graphics shows how signal pin assignments can be automatically optimized between multiple FPGAs on the PCB while respecting pin-specific rules and constraints. Reduce the number of routing layers, minimize crossovers and overall trace lengths on the PCB, and reduce signal integrity issues for higher completion rates and shorter FPGA route times.
To watch this video, click here.
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